| dc.contributor | Gundersen, Rune ,Blom, Harald |
| dc.date.accessioned | 2018-10-29T12:21:41Z |
| dc.date.available | 2018-10-29T12:21:41Z |
| dc.date.issued | 2000 |
| dc.identifier | |
| dc.identifier.isbn | 82-464-0396-6 |
| dc.identifier.other | 2000/00138 |
| dc.identifier.uri | http://hdl.handle.net/20.500.12242/1773 |
| dc.description.abstract | This report conlains a description of a floating-point adder optimized for throughput rather than latecy. It is confirmed with lEEE-754 standard for binary floating-point arithmetic. The design is fully tested and verified. Synthesis results for the A1catel Mietec MTC45000 technology are presented. |
| dc.description.provenance | Submitted by Hayden Young ... on 2017-11-17T20:20:54Z No. of bitstreams: 1 00-00138.pdf: 20753374 bytes, checksum: fc62814e34dd323ec237fc18576a3408 (MD5) ,Approved for entry into archive by Synnove Eifring ... on 2018-10-29T12:21:41Z (GMT) No. of bitstreams: 1 00-00138.pdf: 20753374 bytes, checksum: fc62814e34dd323ec237fc18576a3408 (MD5) ,Made available in DSpace on 2018-10-29T12:21:41Z (GMT). No. of bitstreams: 1 00-00138.pdf: 20753374 bytes, checksum: fc62814e34dd323ec237fc18576a3408 (MD5) Previous issue date: 2000 |
| dc.language.iso | nob |
| dc.title | Addisjonskrets for IEEE-754 flyttall : optimalisert for gjennomstrømning |
| dc.subject.keyword | Integrerte kretser |
| dc.source.issue | 2000/00138 |
| dc.source.pagenumber | 85 |